PCB layout and fab package review
The last check before a hard money commitment. Done properly, this is the review most likely to catch something expensive.
“It routes” is not the same as “It’s ready”
A layout can be DRC-clean, look tidy, and still be wrong in ways the tool cannot see. The constraint set can be a copy from a previous board that never matched this design’s intent. The impedance targets can be correct on paper and unbuildable at the fab you have chosen. A plane split can put a return path somewhere nobody drew.
And the fab package is its own category of defect. Gerbers that don’t match the netlist. An assembly drawing that contradicts the BOM on a no-fit option. Fab notes that specify an IPC class the acceptance criteria don’t reflect. None of that shows up until the boards arrive wrong, and by then the money is spent.
So this review runs in two directions: the layout as a piece of engineering, and the package as a set of documents that have to agree with each other and with the schematic.
Send ODB++ or IPC-2581 if you can
Bare Gerbers with no netlist turn a good part of the cross-checking manual, which costs about half a day and finds less. If Gerbers are all you have, that’s workable, and I will tell you what it costs in coverage.
Best value before fab release
A respin on a moderately complex board is £5k to £30k in scrapped build and tooling, plus six to ten weeks of lead time. That is the number this review is priced against.
What gets worked through
Stackup, materials and impedance
Layer order and symmetry, dielectric choice against the frequencies present, copper weights against the currents. Impedance targets against the trace geometry actually used, and against what your fab house can hold.
Constraint integrity
Whether the rules in the tool match the design intent, which is the question a DRC report structurally cannot answer. Constraints copied from a previous board, over-broad classes, and rules quietly waived to get a clean report.
Placement and floorplan
Functional grouping, sensitive circuits against noisy ones, decoupling placement against the loop it is supposed to close, connector and interface positioning, and whether the layout follows the schematic’s structure or fights it.
Power distribution
Plane shapes, splits and pours. Current density and voltage drop to the far end of a rail. Via count on high-current paths. Where the decoupling network’s return actually goes, rather than where it is assumed to go.
Return paths and grounding
Reference plane continuity under every signal that cares. Slots, splits and voids crossed by high-speed traces. Stitching, and grounding architecture across mixed-signal or isolated regions.
High-speed routing
Length matching and skew against the actual budget. Via transitions, stubs and whether back-drilling is called for. BGA breakout, crosstalk between aggressor and victim pairs, DDR topology, and impedance discontinuities at connectors and transitions.
Thermal and EMC
Copper as a heatsink, thermal vias, and whether the assumed airflow exists. Apertures, slots, cable and connector treatment, filtering and shielding, and the emissions paths that turn up in the chamber.
DFM, DFA and test
Annular ring, spacing, aspect ratio, minimum features, mask slivers, panelisation. Courtyard, paste apertures, thermal relief, polarity marking, tombstoning risk, rework access. Test point coverage against ICT, flying probe, boundary scan and X-ray for BGAs.
Mechanical fit
Board outline, keepouts, component heights, mounting and stack against the enclosure and the mating hardware, checked against the 3D model where one is supplied.
The fab package itself
Fab and assembly drawings, notes, drill files, pick-and-place, IPC class and acceptance criteria. Whether every document agrees with every other document and with the schematic. This is where the quiet expensive errors live.
High reliability
Where it applies: IPC Class 3 and 3/A specifics, conformal coating and staking, creepage and clearance for the environment, tin whisker policy, and outgassing where the application demands it.
Cross-document consistency
Layout against schematic, BOM against both, assembly drawing against the no-fit variants, mechanical against the 3D model. Mismatches here are common and almost always real.
The package
- Layout database. ODB++ or IPC-2581 preferred, Gerbers accepted.
- Netlist, or the schematic it was generated from. Both is better.
- Stackup: layer order, materials, dielectric thicknesses, copper weights.
- Impedance targets and the controlled-impedance line list.
- Constraint set as exported from the tool.
- Fabrication and assembly drawings, with their notes.
- Drill files, drill drawing, pick-and-place.
- IPC class and acceptance criteria, and who is building it.
- 3D model or STEP export, and the enclosure drawing, if mechanical fit matters.
If something on this list doesn’t exist, tell me. It becomes a stated limitation rather than a week of waiting.
Depth
| Tier | Depth | From |
|---|---|---|
| Scan 3 days | Package completeness, stackup sanity, placement and floorplan, obvious return path and DFM problems. No detailed routing analysis. | £750 +VAT |
| Standard 7 days | Full checklist, including constraint set against intent, return path continuity on everything that cares, DFM and DFA, test coverage, and a cross-check of the fab package against the schematic. | £2,750 +VAT |
| Deep 15 days | Adds impedance recalculation, a full DFM assessment against your named fab house’s capability document, thermal path calculation, and a re-review of the corrected revision. | £6,500 +VAT |
Starting prices. Where a job lands within a tier depends on size and complexity, and the proposal carries one firm number before anything begins.
Full pricing and what changes it →
Boards over 12 layers, HDI or rigid-flex
Priced with a multiplier, stated openly in the proposal rather than buried in the total. Effort scales with layer count and via structure, not with company size.
Reviewing something else?
Four review types, run to the same standard. Two in one engagement takes 10% off the second.
Releasing to fab soon?
Worth a thirty minute call before the money goes out. Tell me the layer count, the density and the date, and I will tell you honestly whether a review still helps at this stage.